Master Thesis
Abstract
Embedded systems like an IPAQ handheld keep getting more complex from release to release. In the last updates they are augmented with improved video and audio playback capabilities. As a consequence the computation demand on the device is massively increased and the main CPU needs to be supplemented by a video-decoder ASIC.
Alternatively to such an ASIC a dynamically reconfigurable Field-Programmable Gate Array (FPGA) could be used. An FPGA is reconfigurable while the rest of a running system is unaffected. The device provides an flexible and powerful architecture for implementing computation intensive applications. Including an FPGA it is even possible to update an handheld with a forthcoming video-codec at a later date.
In this theses I show an implementation approach of an heterogeneous systems consisting of an IPAQ and an FPGA-based hardware extension. As a mathematical foundation I have used the Kahn Process Network which is very suitable for parallelism and reusability in signal processing and media applications.
I explain in the text the steps it tooks to design and implement the current execution unit for Kahn hardware tasks, to upload new configurations to the extension board, to reconfigure the system triggered by an software event from the IPAQ and finally to implement an application and run it in the framework.